Items where Author is "Stoyanov, S."

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Number of items: 27.

Ahsan, M., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Albarbar, A. (2020) Developing computational intelligence for smart qualification testing of electronic products. IEEE Access, 8. pp. 16922-16933. ISSN 2169-3536 (Online) (doi:10.1109/ACCESS.2020.2967858)

Tilford, T. ORCID: https://orcid.org/0000-0001-8307-6403, Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Tourloukis, G. and Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 (2016) Numerical analysis of droplet deposition in inkjet printed electronics assembly. In: 2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE). IEEE, pp. 1-7. ISBN 978-1-5090-2106-2 (doi:10.1109/EuroSimE.2016.7463358)

Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Tilford, T. and Tourloukis, G. (2016) Modelling methodologies for quality assessment of 3D inkjet printed electronic products. In: 3rd Fraunhofer Direct Digital Manufacturing Conference, DDMC 2016. Proceedings. Fraunhofer Verlag, Stuttgart. ISBN 978-3-8396-9128-1 ISSN 978-3-8396-1001-5 (Online)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226 and Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 (2015) Modelling the impact of refinishing processes on COTS components for use in aerospace applications. Microelectronics Reliability, 55 (9-10). pp. 1271-1279. ISSN 0026-2714 (doi:10.1016/j.microrel.2015.07.030)

Sutharssan, T., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Rosunally, Y. (2012) Data analysis techniques for real-time prognostics and health management of semiconductor devices. In: Microelectronics and Packaging. Institute of Electrical and Electronic Engineers, Inc, Piscataway, NJ, USA, pp. 1-7. ISBN 978-1-4673-0694-2 (print)

Rosunally, Y.Z., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Mason, P., Campbell, S., Monger, G. and Bell, I. (2011) Fusion approach for prognostics framework of heritage structure. IEEE Transactions on Reliability, 60 (1):570453. pp. 3-13. ISSN 0018-9529 (doi:10.1109/TR.2011.2104451)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Tang, Y.K., Marson, S., Dyer, A., Allen, D. and Desmulliez, M. (2010) Computational modelling and optimisation of the fabrication of nano-structures using focused ion beam and imprint forming technologies. Journal of Physics: Conference Series (JPCS), 253 (1):012008. ISSN 1742-6588 (Print), 1742-6596 (Online) (doi:10.1088/1742-6596/252/1/012008)

Mallik, A., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Firth, P. (2009) Design for reliability methodology for micro laser welding of pigtail fibres. In: Thermal, Mechanical and Multi-Physics simulation and Experiments in Microelectronics and Microsystems. Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 1-7. ISBN 978-1-4244-4161-7 (electronic), 978-1-4244-4160-0 (print) (doi:10.1109/ESIME.2009.4938409)

Tang, Ying Kit, Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Chan, Y.C. (2008) Uncertainty analysis to minimise risk in designing micro-electronics manufacturing processes. In: 2nd Electronics System-Integration Technology Conference, 2008. ESTC 2008. Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 941-946. ISBN 978-1-4244-2814-4 (Print), 978-1-4244-2813-7 (Electronic) (doi:10.1109/ESTC.2008.4684478)

Tang, Y.K., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Chan, Y.C. (2008) Optimisation methodology for risk mitigation in advanced micro-system electronics manufacturing. In: EngOpt 2008 - International Conference on Engineering Optimization. Universidade Federal do Rio de Janeiro, Rio de Janeiro, Brazil. ISBN 978-85-7650-152-7

Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Strusevich, N. and Yannou, J.-M. (2007) Reliability analysis of SiP structures. HDP'07: Proceedings of the 2007 International Symposium on High Density Packaging and Microsystem Integration. Institute of Electrical and Electronics Engineers, Inc., New York, p. 38. ISBN 9781424412525 (doi:10.1109/HDP.2007.4283556)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Mason, P. and Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 (2006) Computational methodology for analysis of historic composite structures. In: Proceedings of the 5th International Conference on Engineering Computational Technology. Civil-Comp Press, Stirlingshire, UK. ISBN 1905088116 ISSN 1759-3433 (doi:10.4203/ccp.84.132)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Saxena, N. and Adams, S. (2005) Optimising the wave soldering process for lead free solders. In: Proceeding of 2005 International Conference on Asian Green Electronics - Design for Manufacturability and Reliability - (2005 AGEC). Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 125-128. ISBN 0780388062 (doi:10.1109/AGEC.2005.1452331)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Mackay, W., Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Jibb, D. and Gregson, C. (2004) Lifetime assessment of electronic components for high reliability aerospace applications. In: Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004). Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 324-329. ISBN 0780388216 (doi:10.1109/EPTC.2004.1396627)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Saxena, N. and Adams, S. (2004) Modelling the wave soldering process. In: Proceedings of the 6th International Conference on Electronics Materials and Packaging (EMAP 2004). Institute of Electrical and Electronics Engineers, pp. 553-558. ISBN 983251486X

Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226 and Lu, H. ORCID: https://orcid.org/0000-0002-4392-6562 (2004) Reliability predictions for high density packaging. In: Proceeding of The Sixth IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis (HDP'04). Institute of Electrical and Electronics Engineers, Inc., Piscataway, N.J., U.S.A., pp. 121-128. ISBN 0780386205 (doi:10.1109/HPD.2004.1346684)

Desmulliez, M.P.Y., Kay, R.W., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226 and Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 (2004) Stencil printing at sub-100 microns pitch. In: Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004). Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 354-358. ISBN 0780388216 (doi:10.1109/EPTC.2004.1396633)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226 and Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 (2003) Optimization and finite element analysis for reliable electronic packaging. In: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-electronics and Micro-systems. Proceedings of EuroSimE 2003. Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 391-399. ISBN 0780370546

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Kay, R., Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Desmuilliez, M. and Hendriksen, M. (2003) Ultra-fine pitch flip-chip assembly using isotropic conductive adhesives. In: Proceedings of 5th Electronics Packaging Technology Conference (EPTC 2003). Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 797-802. ISBN 0780382056 (doi:10.1109/EPTC.2003.1271627)

Lu, H. ORCID: https://orcid.org/0000-0002-4392-6562, Hung, K.C., Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Chan, Y.C. (2002) No-flow underfill flip chip assembly–an experimental and modeling analysis. Microelectronics Reliability, 42 (8). pp. 1205-1212. ISSN 0026-2714 (doi:10.1016/S0026-2714(02)00092-6)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Lu, H. ORCID: https://orcid.org/0000-0002-4392-6562 and Cross, M. (2002) Integrated computational mechanics and optimization for design of electronic components. In: Parmee, Ian C. and Hajela, Prabhat, (eds.) Optimization In Industry. Springer Verlag, pp. 57-71. ISBN 9781852338342

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Cross, M. (2002) Optimisation modelling for flip-chip solder joint reliability. Soldering and Surface Mount Technology, 14 (1). pp. 49-58. ISSN 0954-0911 (doi:10.1108/09540910210416477)

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226 and Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 (2002) Response Surface Modeling and Optimisation for Reliable Electronic Products. In: The Fifth International IEEE Symposium on High Density Packaging and Component Failure Analysis in Electronics Manufacturing. Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 49-57. ISBN 0780398238

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Cross, M. (2001) Integrating computational mechanics and numerical optimization for the design of material properties in electronic packages. In: Computational Modeling of Materials, Minerals and Metals Processing [Conference Proceedings]. The Mineral, Metals and Materials Society (TMS), Warrendale, PA, USA, pp. 551-562. ISBN 0873395131

Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879 and Lu, H. ORCID: https://orcid.org/0000-0002-4392-6562 (2001) Optimisation tools for flip-chip design. In: The pacific RlM/ASME International Electronic Packaging Technical Conference and Exhibition, JuIy 8-13 2001, Maui, Hawaii, USA.

Lu, H. ORCID: https://orcid.org/0000-0002-4392-6562, Stoyanov, S. ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, C. ORCID: https://orcid.org/0000-0002-9438-3879, Hung, K.C. and Chan, Y.C. (2001) A modelling and experimental analysis of the no-flow underfill process for flip-chip assembly. In: Proceedings of the 4th International Symposium on Electronic Packaging Technology. Institute of Electrical and Electronics Engineers, Inc., pp. 338-343. ISBN 0780398114

This list was generated on Sun Dec 22 13:38:52 2024 UTC.