Hot Solder Dip, (HSD), electronic components, Quad Flat Package, (QFP)

Stoyanov, Stoyan ORCID: https://orcid.org/0000-0001-6091-1226, Best, Chris, Yin, Chunyan ORCID: https://orcid.org/0000-0003-0298-0420, Alam, M.O., Bailey, Chris ORCID: https://orcid.org/0000-0002-9438-3879 and Tollafield, Peter (2012) Experimental and modelling study on the effects of refinishing lead-free microelectronic components. In: 2012 4th Electronic System-Integration Technology Conference (ESTC). Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA. ISBN 9781467346450 (doi:10.1109/ESTC.2012.6542213)

modelling methodology, thermal analysis, hot solder dip process, tin whiskers

Stoyanov, Stoyan ORCID: https://orcid.org/0000-0001-6091-1226, Bailey, Chris ORCID: https://orcid.org/0000-0002-9438-3879, Alam, M.O., Yin, Chunyan ORCID: https://orcid.org/0000-0003-0298-0420, Best, Chris, Tollafield, Peter, Crawford, Rob, Parker, Mike and Scott, Jim (2013) Modelling methodology for thermal analysis of hot solder dip process. Microelectronics Reliability, 53 (8). pp. 1055-1067. ISSN 0026-2714 (doi:10.1016/j.microrel.2013.02.018)

statistical hypothesis testing, refinishing, hot solder dip, leaded component, lead-free

Yin, Chunyan ORCID: https://orcid.org/0000-0003-0298-0420, Best, Chris, Bailey, Chris ORCID: https://orcid.org/0000-0002-9438-3879 and Stoyanov, Stoyan ORCID: https://orcid.org/0000-0001-6091-1226 (2015) Statistical analysis of the impact of refinishing process on leaded components. Microelectronics Reliability, 55 (2). pp. 424-431. ISSN 0026-2714 (doi:10.1016/j.microrel.2014.11.001)