Numerical assessment of the effect of void morphology on thermo-mechanical performance of solder thermal interface material
Otiaba, Kenny C., Okereke, M.I. ORCID: 0000-0002-2104-012X and Bhatti, R.S. (2014) Numerical assessment of the effect of void morphology on thermo-mechanical performance of solder thermal interface material. Applied Thermal Engineering, 64 (1–2). 51 - 63. ISSN 1359-4311 (doi:https://doi.org/10.1016/j.applthermaleng.2013.12.006)
Full text not available from this repository. (Request a copy)Abstract
The presence of voids in solder thermal interface material (STIM) layers affects the reliability and mechanical performance of formed solder joint. Previous studies suggest that the level of void effect depends not only on the size of the voids but also on the distribution and location of voids. In this work, a void morphology generating algorithm was used to generate representative volume elements (RVEs) depicting the seeming randomness of voids in a given STIM layer. The generated 2D RVEs were converted to 3D RVEs within a finite element modelling (FEM) environment and subsequently incorporated into the chip and heat spreader to complete the geometric model. The maximum damage site in the Sn-3Ag-0.5Cu (SAC305) solder joint as predicted by finite element analysis (FEA) of the geometric model showed a good qualitative agreement with experimental observations elsewhere. Further numerical assessment of the thermo-mechanical performance of SAC305 alloy as STIM layer due to the different generated void morphology was carried out. Results showed that solder voids can either influence the initiation or propagation of damage in the STIM layer, depending on the configuration, size and location of voids. While the small voids around the critical region of the solder joints appeared to enhance stress and strain localisation around the maximum damage site thus facilitating damage initiation; small voids also showed potentials of arresting damage propagation. In addition, results from this study indicated that void located in the surface of the solder joint, particularly voids at the solder/silicon die interface are more detrimental compared to void embedded in the middle of the solder layer. The innovative technique employed in this study to numerically generate realistic solder void morphologies would be beneficial to the solder voids modelling research community.
Item Type: | Article |
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Uncontrolled Keywords: | solder voids, finite element analysis, solder die-attach, thermo-mechanical reliability, representative volume element |
Subjects: | T Technology > TA Engineering (General). Civil engineering (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Faculty / School / Research Centre / Research Group: | Faculty of Engineering & Science |
Related URLs: | |
Last Modified: | 08 Sep 2020 16:10 |
URI: | http://gala.gre.ac.uk/id/eprint/11139 |
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