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Optimisation modelling for flip-chip solder joint reliability

Optimisation modelling for flip-chip solder joint reliability

Stoyanov, S. ORCID: 0000-0001-6091-1226, Bailey, C. and Cross, M. (2002) Optimisation modelling for flip-chip solder joint reliability. Soldering and Surface Mount Technology, 14 (1). pp. 49-58. ISSN 0954-0911 (doi:10.1108/09540910210416477)

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Abstract

This paper details and demonstrates integrated optimisation-reliability modelling for predicting the performance of solder joints in electronic packaging. This integrated modelling approach is used to identify efficiently and quickly the most suitable design parameters for solder joint performance during thermal cycling and is demonstrated on flip-chip components using “no-flow” underfills. To implement “optimisation in reliability” approach, the finite element simulation tool – PHYSICA, is coupled with optimisation and statistical tools. This resulting framework is capable of performing design optimisation procedures in an entirely automated and systematic manner.

Item Type: Article
Uncontrolled Keywords: flip chip, optimization, reliability, underfill
Subjects: Q Science > QA Mathematics > QA76 Computer software
T Technology > T Technology (General)
Pre-2014 Departments: School of Computing & Mathematical Sciences
School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis
School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis > Computational Mechanics & Reliability Group
School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis > Computational Science & Engineering Group
School of Computing & Mathematical Sciences > Department of Computer Systems Technology
School of Computing & Mathematical Sciences > Department of Mathematical Sciences
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Last Modified: 14 Oct 2016 09:01
Selected for GREAT 2016: None
Selected for GREAT 2017: None
Selected for GREAT 2018: None
URI: http://gala.gre.ac.uk/id/eprint/769

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