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Predicting the relationship between reliability and geometric parameters of cu column bumped flip-chips

Predicting the relationship between reliability and geometric parameters of cu column bumped flip-chips

Lu, H. ORCID logoORCID: https://orcid.org/0000-0002-4392-6562 and Bailey, C. ORCID logoORCID: https://orcid.org/0000-0002-9438-3879 (2002) Predicting the relationship between reliability and geometric parameters of cu column bumped flip-chips. In: The Fifth International IEEE Symposium on High Density Packaging and Component Failure Analysis in Electronics Manufacturing [Proceedings]. Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 85-89. ISBN 078039822X

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Abstract

Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded directly with the dies. It has eliminated the under-bump-metallurgy (UBM) fonnation step of the traditional flip chip manufacturing process. This bumping technique has the potential benefits of simplifying the flip chip manufacturing process, increasing productivity and the UO counts. In this paper, a study of reliability of Cu column bumped flip chips will be presented. Computer modelling methods have been used to predict the shape of solder joints and the response of flip chips to cyclic thermal-mechanical loading. The accumulated plastic strain energy at the corner solder joints has been used as an indicator of the solder joint reliability. Models with a wide range of design parameters have been compared for their reliability. The design parameters that have been investigated are the copper column height and radius, PCB pad radius, solder volume and Cu column wetting height. The relative importance ranking of these parameters has been obtained. The Lead-free solder material 96.5Sn3.5Ag has been used in this modelling work.

Item Type: Conference Proceedings
Title of Proceedings: The Fifth International IEEE Symposium on High Density Packaging and Component Failure Analysis in Electronics Manufacturing [Proceedings]
Additional Information: [1] This paper was first presented at the Fifth International IEEE Symposium on High Density Packaging and Component Failure Analysis in Electronics Manufacturing (HDP'02) held from 30 June - 3 July 2002 in Shanghai, China. [2] ISBN: 078039822X; 0780398238
Uncontrolled Keywords: flip chip packaging, Cu columns, computer modelling
Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
T Technology > TK Electrical engineering. Electronics Nuclear engineering
Pre-2014 Departments: School of Computing & Mathematical Sciences
School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis
School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis > Computational Mechanics & Reliability Group
School of Computing & Mathematical Sciences > Department of Computer Systems Technology
School of Computing & Mathematical Sciences > Department of Mathematical Sciences
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Last Modified: 20 Mar 2019 11:54
URI: http://gala.gre.ac.uk/id/eprint/787

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