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Optimisation tools for flip-chip design

Optimisation tools for flip-chip design

Stoyanov, S., Bailey, C. and Lu, H. (2001) Optimisation tools for flip-chip design. In: The pacific RlM/ASME International Electronic Packaging Technical Conference and Exhibition, JuIy 8-13 2001, Maui, Hawaii, USA.

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Item Type: Conference or Conference Paper (Paper)
Pre-2014 Departments: School of Computing & Mathematical Sciences
Last Modified: 14 Oct 2016 09:01
Selected for GREAT 2016: None
Selected for GREAT 2017: None
Selected for GREAT 2018: None

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