The automatic implementation of a dynamic load balancing strategy within structured mesh codes generated using a parallelisation tool
Rodrigues, Jacqueline Nadine (2003) The automatic implementation of a dynamic load balancing strategy within structured mesh codes generated using a parallelisation tool. PhD thesis, University of Greenwich.
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This research demonstrates that the automatic implementation of a dynamic load balancing (DLB) strategy within a parallel SPMD (single program multiple data) structured mesh application code is possible. It details how DLB can be effectively employed to reduce the level of load imbalance in a parallel system without expert knowledge of the application. Furnishing CAPTools (the Computer Aided Parallelisation Tools) with the additional functionality of DLB, a DLB parallel version of the serial Fortran 77 application code can be generated quickly and easily with the press of a few buttons, allowing the user to obtain results on various platforms rather than concentrate on implementing a DLB strategy within their code. Results show that the devised DLB strategy has successfully decreased idle time by locally increasing/decreasing processor workloads as and when required to suit the parallel application, utilising the available resources efficiently.
Several possible DLB strategies are examined with the understanding that it needs to be generic if it is to be automatically implemented within CAPTools and applied to a wide range of application codes. This research investigates the issues surrounding load imbalance, distinguishing between processor and physical imbalance in terms of the load redistribution of a parallel application executed on a homogeneous or heterogeneous system. Issues such as where to redistribute the workload, how often to redistribute, calculating and implementing the new distribution (deciding what data arrays to redistribute in the latter case), are all covered in detail, with many of these issues common to the automatic implementation of DLB for unstructured mesh application codes.
The devised DLB Staggered Limit Strategy discussed in this thesis offers flexibility as well as ease of implementation whilst minimising changes to the user's code. The generic utilities developed for this research are discussed along with their manual implementation upon which the automation algorithms are based, where these utilities are interchangeable with alternative methods if desired. This thesis aims to encourage the use of the DLB Staggered Limit Strategy since its benefits are evidently significant and are now easily achievable with its automatic implementation using CAPTools.
|Item Type:||Thesis (PhD)|
|Uncontrolled Keywords:||load balancing, computer networking, multiple instruction, multiple data, parallel programming,|
|Subjects:||Q Science > QA Mathematics > QA75 Electronic computers. Computer science|
|School / Department / Research Groups:||School of Computing & Mathematical Sciences|
School of Computing & Mathematical Sciences > Parallel Processing Research Group (2000)
|Last Modified:||27 Sep 2012 09:35|
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