A study of the rheological properties of lead free solder paste formulations used for flip-chip interconnection
Ekere, Ndy, Mallik, Sabuj, Durairaj, Rajkumar and Marks, Antony (2007) A study of the rheological properties of lead free solder paste formulations used for flip-chip interconnection. In: 32nd IEEE/CPMT International Electronic Manufacturing Technology Symposium. IEEE/CPM International Electronics Manufacturing Technology Symposium . IEEE, New York, USA, pp. 165-171. ISBN 9781424413355Full text not available from this repository.
The market for solder paste materials in the electronics
sector is very large and consists of material and equipment
suppliers and end users. These materials are used to bond
electronic components (e.g. flip-chip, BGA) to printed circuit boards (PCB’s) across a range of dimensions where the solder interconnects can be 50 microns to 1mm in size. For materials suppliers, the trends in the market are towards environmentally friendly materials (e.g. lead-free solders) that can be used at ever-smaller dimension where the properties of the materials must ensure reliable product performance. Equipment suppliers, for example printing machine manufacturers, are continually updating their equipment characteristics to ensure better print yield of solder paste onto a PCB. Whilst the End Users must ensure that the combination of materials and equipment used will provide the required product quality in terms of reliable interconnection performance.
This study concerns the rheological characterisation of
different lead-free solder paste formulations used for flip-chip interconnections, and is made up of three parts. The first part deals with the measurement of rheological properties with three different measuring geometries, the second part looks into the effect of frequencies on oscillatory stress sweep measurements and the final part reports on the characterisation and comparison of three different lead-free solder paste formulations. The
objective of the study is to investigate the rheological behaviour of the three lead-free solder paste formulations used for flipchip interconnection.
Our study shows that of the three plate geometries evaluated,the serrated parallel plate geometry was more effective in minimizing the wall-slip. Our results also show that for the oscillatory stress-sweep measurement, the linear visco-elastic region (LVR) is independent of frequency for the three solder paste formulations. The results also show how wall-slip effects can be minimized in rheological measurements of solder pastes. The paper also outlines how different rheological test methods can be used to characterise solder paste behaviours and useful guide for both paste manufacturers and process engineers
implementing flip-chip assembly.
|Item Type:||Book Section|
|Additional Information:||This paper forms part of a published proceedings from the IEEE/CPMT International Electronic Manufacturing Technology Symposium San Jose, CA, OCT 03-05, 2007.|
|Uncontrolled Keywords:||emulsions, flow, water|
|Subjects:||T Technology > T Technology (General)|
T Technology > TK Electrical engineering. Electronics Nuclear engineering
|School / Department / Research Groups:||School of Engineering|
School of Engineering > Department of Engineering Systems
School of Engineering > Electronics Manufacturing Engineering Research Group
|Last Modified:||21 Dec 2012 12:43|
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