Skip navigation

Modelling the behavior of solder joints for wafer level SiP

Modelling the behavior of solder joints for wafer level SiP

Strusevitch, Nadia, Stoyanov, Stoyan, Liu, D., Bailey, Christopher, Richardson, A., Dumas, N., Yannou, J.M. and Georgel, V. (2006) Modelling the behavior of solder joints for wafer level SiP. In: Pang, J.H.L., Vaidyanathan, K., Wong, S.C.K. and Tee, T.Y., (eds.) 2006 8th Electronics Packaging Technology Conference (EPTC 2006) : 6-8 December 2006, Singapore. IEEE, Picsataway, N.J., pp. 127-132. ISBN 1424406641; 142440665X (doi:10.1109/EPTC.2006.342703)

Full text not available from this repository.

Abstract

Design for manufacture of system-in-package (SiP) structures is dependent on a number of physical processes that affect the final quality of the package in terms of its performance and reliability. Solder joints are key structures in a SiP and their behavior can be the critical factor in terms of reliability. This paper discusses the results from a research programme on design for manufacturing of system in package (SiP) technologies. The focus of the paper is on thermo-mechanical modelling of solder joints. This includes the behavior of the joints during testing plus some important insights into the reflow process and how physical phenomena taking place at the assembly stage can affect solder joint behavior. Finite element analysis of a numerical model of an SiP structure with various design parameters is discussed. The goal of this analysis is to identify the most promising combination of design parameters which guarantee longer lifetime of the solder joints and hence the SiP component. The parameters that were studied are the size of the package (i.e. number of solder joints per row), the presence of the underfill and/or the reinforcement as well as the thickness of the passive die. Discussion was also provided on phenomena that take place during the reflow process where the solder joints are formed. In particular, the formation of intermetallics at the solder-pad interfaces

Item Type: Book Section
Additional Information: Presented at 8th IEEE Electronics Packaging Technology Conference, Singapore, 6-8 December 2006
Uncontrolled Keywords: SiP, packaging design, solder joints, numerical modelling
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Q Science > QA Mathematics
Pre-2014 Departments: School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis
School of Computing & Mathematical Sciences
School of Computing & Mathematical Sciences > Centre for Numerical Modelling & Process Analysis > Computational Mechanics & Reliability Group
School of Computing & Mathematical Sciences > Department of Computer Systems Technology
Related URLs:
Last Modified: 12 Jul 2018 12:42
Selected for GREAT 2016: None
Selected for GREAT 2017: None
Selected for GREAT 2018: None
URI: http://gala.gre.ac.uk/id/eprint/1018

Actions (login required)

View Item View Item