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Items where Author is "Wong, S.C.K."

Items where Author is "Wong, S.C.K."

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numerical modelling packaging design SiP solder joints
Number of items: 4.

numerical modelling

Strusevitch, Nadia, Stoyanov, Stoyan ORCID logoORCID: https://orcid.org/0000-0001-6091-1226, Liu, D., Bailey, Christopher ORCID logoORCID: https://orcid.org/0000-0002-9438-3879, Richardson, A., Dumas, N., Yannou, J.M. and Georgel, V. (2006) Modelling the behavior of solder joints for wafer level SiP. In: Pang, J.H.L., Vaidyanathan, K., Wong, S.C.K. and Tee, T.Y., (eds.) 2006 8th Electronics Packaging Technology Conference (EPTC 2006) : 6-8 December 2006, Singapore. IEEE, Picsataway, N.J., pp. 127-132. ISBN 1424406641; 142440665X (doi:10.1109/EPTC.2006.342703)

packaging design

Strusevitch, Nadia, Stoyanov, Stoyan ORCID logoORCID: https://orcid.org/0000-0001-6091-1226, Liu, D., Bailey, Christopher ORCID logoORCID: https://orcid.org/0000-0002-9438-3879, Richardson, A., Dumas, N., Yannou, J.M. and Georgel, V. (2006) Modelling the behavior of solder joints for wafer level SiP. In: Pang, J.H.L., Vaidyanathan, K., Wong, S.C.K. and Tee, T.Y., (eds.) 2006 8th Electronics Packaging Technology Conference (EPTC 2006) : 6-8 December 2006, Singapore. IEEE, Picsataway, N.J., pp. 127-132. ISBN 1424406641; 142440665X (doi:10.1109/EPTC.2006.342703)

SiP

Strusevitch, Nadia, Stoyanov, Stoyan ORCID logoORCID: https://orcid.org/0000-0001-6091-1226, Liu, D., Bailey, Christopher ORCID logoORCID: https://orcid.org/0000-0002-9438-3879, Richardson, A., Dumas, N., Yannou, J.M. and Georgel, V. (2006) Modelling the behavior of solder joints for wafer level SiP. In: Pang, J.H.L., Vaidyanathan, K., Wong, S.C.K. and Tee, T.Y., (eds.) 2006 8th Electronics Packaging Technology Conference (EPTC 2006) : 6-8 December 2006, Singapore. IEEE, Picsataway, N.J., pp. 127-132. ISBN 1424406641; 142440665X (doi:10.1109/EPTC.2006.342703)

solder joints

Strusevitch, Nadia, Stoyanov, Stoyan ORCID logoORCID: https://orcid.org/0000-0001-6091-1226, Liu, D., Bailey, Christopher ORCID logoORCID: https://orcid.org/0000-0002-9438-3879, Richardson, A., Dumas, N., Yannou, J.M. and Georgel, V. (2006) Modelling the behavior of solder joints for wafer level SiP. In: Pang, J.H.L., Vaidyanathan, K., Wong, S.C.K. and Tee, T.Y., (eds.) 2006 8th Electronics Packaging Technology Conference (EPTC 2006) : 6-8 December 2006, Singapore. IEEE, Picsataway, N.J., pp. 127-132. ISBN 1424406641; 142440665X (doi:10.1109/EPTC.2006.342703)

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