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Modelling and testing the impact of hot solder dip process on leaded components

Modelling and testing the impact of hot solder dip process on leaded components

Stoyanov, Stoyan ORCID: 0000-0001-6091-1226, Best, Chris, Alam, Mohammad, Bailey, Christopher ORCID: 0000-0002-9438-3879, Tollafield, Peter, Parker, Mike and Scott, Jim (2012) Modelling and testing the impact of hot solder dip process on leaded components. In: 2012 35th International Spring Seminar on Electronics Technology. IEEE Conference Publications . Institute of Electrical and Electronic Engineers, Inc., Piscataway, N.J., USA, pp. 303-308. ISBN 978-1-4673-2241-6 (Print), 978-1-4673-2239-3 (Online) ISSN 2161-2528 (doi:https://doi.org/10.1109/ISSE.2012.6273091)

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Abstract

The use of microelectronics components with lead-free solder finishes on their terminations in high reliability and safety critical defence and aerospace equipment is associated with major longterm reliability issues due to tin-whisker growth phenomena. A potential solution to this problem is to “re-finish” the package terminations by removing the tin coating from the leads and replace with conventional tin-lead solder in a post-manufacturing process known as hot solder dip (HSD). This paper details a modelling approach to the thermo-mechanical characterisation of leaded components subjected to a double-dip HSD process. Transient thermal finite element analysis (FEA) is used to evaluate the temperature distribution and gradients in a QFP-type component and then used as thermal loads to predict the stress evolution in the package. The risk of thermally induced damage in the part at package level is assessed using the model predictions and compared with findings from electrical and CSAM tests undertaken on a pre- and post- refinished samples. It is concluded that in the instance of the studied part no thermo-mechanical damage is induced as a result of the HSD.

Item Type: Conference Proceedings
Title of Proceedings: 2012 35th International Spring Seminar on Electronics Technology
Additional Information: [1] This paper was presented at the 2012 35th International Spring Seminar (ISSE) on Electronics Technology held from 9-13 May 2012 in Bad Aussee, Austria. [2] INSPEC Accession Number: 12945449 [3] The authors acknowledge the contributions made by Rolls Royce, Selex Galileo, Cassidian Electronics and General Dynamics.
Uncontrolled Keywords: hot solder dip, (HSD), leaded components, copper, electronic packaging thermal management, predictive models, stress, thermal stresses, thermomechanical processes, wires
Subjects: Q Science > Q Science (General)
Pre-2014 Departments: School of Computing & Mathematical Sciences
Related URLs:
Last Modified: 13 Mar 2019 11:34
Selected for GREAT 2016: None
Selected for GREAT 2017: None
Selected for GREAT 2018: None
Selected for GREAT 2019: None
URI: http://gala.gre.ac.uk/id/eprint/9447

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