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Items where Author is "Vaidyanathan, K."

Items where Author is "Vaidyanathan, K."

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Alam, M. O., Lu, Hua, Bailey, Christopher, Chan, Y.C. and Wu, B.Y. (2007) Shear strength analysis of ball grid array (BGA) solder interfaces. In: Vaidyanathan, K., Tee, T.Y. and Lee, T.K., (eds.) 2007 9th Electronics Packaging Technology Conference. Electronics Packaging Technology Conference Proceedings . Institute of Electrical and Electronics Engineers, Inc., Piscataway, NJ, USA, pp. 770-773. ISBN 9781424413249 (doi:11.1109/EPTC.2007.4469797)

Strusevitch, Nadia, Stoyanov, Stoyan, Liu, D., Bailey, Christopher, Richardson, A., Dumas, N., Yannou, J.M. and Georgel, V. (2006) Modelling the behavior of solder joints for wafer level SiP. In: Pang, J.H.L., Vaidyanathan, K., Wong, S.C.K. and Tee, T.Y., (eds.) 2006 8th Electronics Packaging Technology Conference (EPTC 2006) : 6-8 December 2006, Singapore. IEEE, Picsataway, N.J., pp. 127-132. ISBN 1424406641; 142440665X (doi:10.1109/EPTC.2006.342703)

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